B3.2 - Reliability Embedded Test Engineering (RETE)
- Event
- ETTC 2026 - European Test and Telemetry Conference
2026-06-09 - 2026-06-11
Nuremberg - Chapter
- Sustainable Testing & Materials
- Author(s)
- A. Cherchari, R. Gera, F. Spitzbarth, M. Lipowski, D. Kriesten - Fraunhofer ENAS, Chemnitz (Germany), L. Moriconi, A. Maseri - ELES Semiconductor Equipment SpA, Todi (Italy)
- Pages
- 217 - 224
- DOI
- 10.5162/ettc2026/B3.2
- Price
- free
Abstract
The semiconductor production and testing facilities face a major hurdle in the form of intermittent and latent failures occurring in system-on-chip (SoC) devices. Modern HTOL and Burn-In test systems are utilized to perform standardized reliability screening tests (JESD₄₇, JESD₂₂-A₁₀₈) [2][3] to achieve “Zero–Defect” semiconductor production. The test systems generate large volumes of data from multiple sources (ATE, burn-in boards, equipment, and environment logs and on-chip diagnostics), generally stored in formats such as STDF, CSV, etc. Due to such complex data ingestion and focus on the yield of pass/fail assessments, subtle multi-parametric degradation and failures remain undetected, causing burn-in and HTOL conditions to be unnecessarily stringent. The Reliability Embedded Test Engineering (RETE) [1] is a project that focuses on developing an AIdriven reliability analytics software that is completely integrated with ELES Test-for-Reliability (TfR) framework and ART burn-in test systems. Core elements of this software consist of an unified test data format, an automated data validation and an analytics toolchain library that combines conventional statistics with specialized machine learning modules for failure prediction and lifetime estimation. The goal is to turn HTOL/ELFR process from a time and resource intensive screening step into a predictive reliability instrument.