2.1 - High Performance Uncooled Amorphous Silicon IRFPA with 17μm Pixel-Pitch

SENSOR+TEST Conferences 2011
2011-06-07 - 2011-06-09
Proceedings IRS² 2011
I2 - IR Arrays & lmaging
J. Tissot, S. Tinnes, A. Durand, C. Minassian, P. Robert, M. Vilain - ULIS, Veurey-Voroize (France)
36 - 41


The high level of accumulated expertise by ULIS and CEA/LETI on uncooled microbolometers made from amorphous silicon with 45 μm, 35 μm and 25 μm, enables ULIS to develop new IRFPA formats with 17 μm pixel-pitch to fulfill every applications.
Amorphous silicon presents attractive properties for microbolometer applications. In particular, when it comes to address TEC-less capability, amorphous silicon devices are coping quite well with temperature variation. The bolometer resistance variation versus temperature is described by Arrhenius law with uniform activation energy Ea which leads to uniform temperature behaviour of pixels and therefore easier TEC-less operation.

Moreover, amorphous silicon is easier to be monolithically integrated onto silicon substrates at temperature compatible with CMOS integrated circuit. Advanced 0.5 μm lithography in connection with thinner films embodiment clearly give an edge to maintain, and even to improve, the thermal insulation when scaling the pixel to 17μm while keeping a simple one level microbridge structure which leads to high operability and high manufacturing yield.

17 μm detector keeps all the recent innovations developed on the 25 μm pixel-pitch ROIC (detector configuration by serial link, low power consumption and wide electrical dynamic range). The specific appeal of these units lies in the high spatial resolution it provides while keeping the small thermal time constant. The reduction of the pixelpitch turns the TEC-less VGA array into a product well adapted for high resolution and compact systems and the XGA a product well adapted for high resolution imaging systems. High electro-optical performances have been demonstrated with NETD < 50 mK. We insist on NETD and wide thermal dynamic range trade-off, and on the high characteristics uniformity, achieved thanks to the mastering of the amorphous silicon technology as well as the ROIC design.
This technology node paves the way to high end products as well as low end compact smaller formats like 320 x 240 and 160 x 120 or smaller taking profit from advanced vacuum packaging technique.