A7.4 - Cell Optimization for the IISIC CMOS-Chip Serving as a Front-End for Integrated Impedance Spectroscopy
- Event
- AMA Conferences 2015
2015-05-19 - 2015-05-21
Nürnberg, Germany - Band
- Proceedings SENSOR 2015
- Chapter
- A7 - Impedance Spectroscopy
- Author(s)
- A. Renner, J. Lappas, A. König - TU Kaiserslautern (Germany)
- Pages
- 166 - 171
- DOI
- 10.5162/sensor2015/A7.4
- ISBN
- 978-3-9813484-8-4
- Price
- free
Abstract
Distributed data acqusition by integrated, potentially wireless autonomous data loggers ist getting increasingly relevant and applied in many application fields, e.g. in measurement, control, and automation as well as internet of things (IoT), cyber-physical(-production systems (CP(P)S), or Industrie 4.0. Impedance Spectroscopy has established itself as a highly capable, versatile, and increasingly applied method in the sensor, measurement, and instrumentation community as well as for chemical, biomedical, nutritional, and sportive applications. Application requirements on electronics can be met by contemporary desktop equipment but not sufficiently by integrated solutions needed for mobile and hand-held solutions. Thus, in our research, we pursue the design of analog front end (AFE) CMOS-chip that meets requirements as bandwidth of 5 Hz - 3.25 MHz, impedance range of 1 Ω - 8 MΩ , etc. identified in our previous application-oriented research, e.g., on hand-held device-based food quality and safety assessment. The cells of the previous Integrated-Impedance Spectroscopy-IC (IISIC) have been revised and manufacturing is aspired to in second half of 2015.