A5.4 - Ultrasonic phased array interface using programmable I/O and microprocessor clock synchronisation
- Event
- SMSI 2025
2025-05-06 - 2025-05-08
Nürnberg - Band
- Lectures
- Chapter
- A5 - Acoustic Sensing
- Author(s)
- T. Nellius, K. Henne, M. Hartinger, L. Meihost, T. Hetkämper, H. Zeipert, L. Claes, B. Henning - Paderborn University, Paderborn (Germany)
- Pages
- 61 - 62
- DOI
- 10.5162/SMSI2025/A5.4
- ISBN
- 978-3-910600-06-5
- Price
- free
Abstract
This contribution constitutes an approach to ultrasonic phased array excitation using programmable input/output banks for fast, digital signal generation, a method to synchronise a number of microprocessors and a minimalistic analogue frontend. Exploiting the low-pass characteristic of the array’s transducers, it is assumed sufficient to apply a binary signal to each element. These signals are generated synchronously by state machines implemented in hardware, a feature present on some microcontrollers designated as programmable input/output. To increase the number of channels, the clock of a number of microcontrollers is synchronised using a phase detection circuit. A digital-input MOSFET low-side driver circuit is used for each channel to amplify the digital signals. Synchronous signal generation for a 64-element array is demonstrated using schlieren imaging.